Journal: Sensors (Basel, Switzerland)

Article Title: Review of Short-Wavelength Infrared Flip-Chip Bump Bonding Process Technology

doi: 10.3390/s25010263

Figure Lengend Snippet: Reported epitaxial InGaAs SWIR FPAs with spectral response range of 0.9–3.0 μm, in terms of active region composition, growth tools, resolution, pitch, pixel size, wafer size, and the measured dark current and quantum efficiency.

Article Snippet: Although Sony Company has proposed Cu-Cu bonding to reduce the pixel pitch of the InGaAs SWIR image sensor to 5 μm, the specifications of FPAs are still at least an order of magnitude lower than those of CMOS sensors [ , ].

Techniques:

Journal: Sensors (Basel, Switzerland)

Article Title: Review of Short-Wavelength Infrared Flip-Chip Bump Bonding Process Technology

doi: 10.3390/s25010263

Figure Lengend Snippet: Schematic diagrams of three dominant methods for the electrical interconnections between epitaxial SWIR sensors and CMOS ROICs: ( a ) wire bonding; ( b ) tape automated bonding , reprinted with permission from ref. , Copyright 2020 SAGE Publications India Pvt; and ( c ) flip-chip bonding. Technology trends for SWIR image sensors: ( d ) monolithically integrated QDPDs on a Si ROIC . ( e ) Cu-Cu hybridized InGaAs SWIR image sensor .

Article Snippet: Although Sony Company has proposed Cu-Cu bonding to reduce the pixel pitch of the InGaAs SWIR image sensor to 5 μm, the specifications of FPAs are still at least an order of magnitude lower than those of CMOS sensors [ , ].

Techniques:

Journal: Sensors (Basel, Switzerland)

Article Title: Review of Short-Wavelength Infrared Flip-Chip Bump Bonding Process Technology

doi: 10.3390/s25010263

Figure Lengend Snippet: Two conventional flip-chip process flows for epitaxial SWIR image sensors . Dual-side bumping (guided by the blue arrows): ( a – g ) indium bump deposition on the CMOS-ROIC wafer; ( h – n ) indium bump deposition on the sensor wafer; ( p – r ) flip-chip bonding with reflowed and ( g , n , o ) non-reflowed indium bumps. Single-side bumping (guided by the purple arrows): ( h – n , q ) indium bump deposition on the sensor wafer with reflow; ( s – w ) thin indium deposition on the CMOS-ROIC wafer; ( x ) reflow-assisted self-aligned flip-chip bonding.

Article Snippet: Although Sony Company has proposed Cu-Cu bonding to reduce the pixel pitch of the InGaAs SWIR image sensor to 5 μm, the specifications of FPAs are still at least an order of magnitude lower than those of CMOS sensors [ , ].

Techniques:

Journal: Sensors (Basel, Switzerland)

Article Title: Review of Short-Wavelength Infrared Flip-Chip Bump Bonding Process Technology

doi: 10.3390/s25010263

Figure Lengend Snippet: The second part of the conventional flip-chip process. Underfill, back thinning, and packaging for flip-chip-bonded SWIR image sensor with ( a – c ) dual-side bumping; ( d – f ) single-side bumping; ( g ) packaged SWIR image sensor for room-temperature operation. The enlarged regions in ( a , d ) illustrate the point-to-point indium connection with different bumping conditions.

Article Snippet: Although Sony Company has proposed Cu-Cu bonding to reduce the pixel pitch of the InGaAs SWIR image sensor to 5 μm, the specifications of FPAs are still at least an order of magnitude lower than those of CMOS sensors [ , ].

Techniques:

Journal: Sensors (Basel, Switzerland)

Article Title: Review of Short-Wavelength Infrared Flip-Chip Bump Bonding Process Technology

doi: 10.3390/s25010263

Figure Lengend Snippet: ( a ) Schematic diagram of the structure of flip-chip hybridized SWIR FPAs. ( b ) Indium bump under different conditions: ① ideal indium bump connection; ② common-shape indium bump in actual manufacturing; ③ shorter indium bump leads to open-circuit connection; ④ and ⑤ short-circuit indium bump connection; ⑥ reflowed indium bump connection.

Article Snippet: Although Sony Company has proposed Cu-Cu bonding to reduce the pixel pitch of the InGaAs SWIR image sensor to 5 μm, the specifications of FPAs are still at least an order of magnitude lower than those of CMOS sensors [ , ].

Techniques:

Journal: Sensors (Basel, Switzerland)

Article Title: Review of Short-Wavelength Infrared Flip-Chip Bump Bonding Process Technology

doi: 10.3390/s25010263

Figure Lengend Snippet: ( a ) SWIR FPA bare module dispensing diagram; ( b ) underfill material flows under capillary action; ( c ) heating cure after dispensing; ( d ) dispensing in a straight line; ( e ) dispensing in an “L” shape; ( f ) dispensing in a “U” shape; ( g ) SWIR FPA bare module after dispensing; ( h ) wetting situation of the underfill material; ( i ) ultrasonic scanning microscopy image of the IRFPA bare module.

Article Snippet: Although Sony Company has proposed Cu-Cu bonding to reduce the pixel pitch of the InGaAs SWIR image sensor to 5 μm, the specifications of FPAs are still at least an order of magnitude lower than those of CMOS sensors [ , ].

Techniques: Microscopy

Journal: Sensors (Basel, Switzerland)

Article Title: Review of Short-Wavelength Infrared Flip-Chip Bump Bonding Process Technology

doi: 10.3390/s25010263

Figure Lengend Snippet: Backside illuminated InGaAs/InP SWIR-FPA visible extension schematic principle. ( a ) Backside-illuminated mesa-type InGaAs/InP SWIR-FPA; ( b ) after InP substrate removal; ( c ) retained N-type InP contact layer around the pixel array; ( d ) backside-illuminated planar-type InGaAs/InP SWIR-FPA with etch-stop layer; ( e ) after InP substrate removal; ( f ) after InGaAs etch-stop layer removal; ( g ) measured QE on SWIR and Vis-SWIR FPA , reprinted with permission from ref. , Copyright 2013 SPIE; ( h ) QE before and after n-InP contact layer etching; ( i ) 10 nm left N-type InP contact layer , reproduced from , open access by MDPI, 2024. The arrows under the spectra in ( a – c ) indicate the absorption and reflection of different bands of infrared radiation for the InGaAs/InP SWIR-FPA.

Article Snippet: Although Sony Company has proposed Cu-Cu bonding to reduce the pixel pitch of the InGaAs SWIR image sensor to 5 μm, the specifications of FPAs are still at least an order of magnitude lower than those of CMOS sensors [ , ].

Techniques: